During processing of an integrated circuit, openings typically referred to as contacts or vias are made through dielectric overlying metal interconnect leads to form electrical contact to the leads. The metal interconnect that is exposed in the these contact or via openings may form a layer of metal oxide on the surface that increases the electrical contact resistance and also may cause significant variation in the electrical contact resistance in these openings across an integrated circuit chip or wafer.
A typical example of forming an aluminum bond pad 110 on a top layer of copper interconnect 102 is illustrated in FIG. 1B. The underlying copper interconnect layer 102 is formed in a dielectric layer 100 using either a single or a dual damascene process. An opening is formed in dielectric layer 104 overlying the copper interconnect layer to form electrical connection to an overlying aluminum bond pad 110. An interdiffusion barrier layer 106 of a material such as Ta or TaN is disposed between the underlying copper interconnect and the overlying aluminum bond pad 110 to prevent interdiffusion of copper and aluminum.
A typical example of forming an upper level of aluminum interconnect 210 on a lower layer of copper interconnect 202 is illustrated in FIG. 2B. The underlying copper interconnect layer 202 is formed in a dielectric layer 200 using either a single or a dual damascene process. Contact or via openings are formed in dielectric layer 204 overlying the copper interconnect layer 202 to form electrical connection between the interconnect layers 202 and 210. An interdiffusion barrier layer 206 of a material such as Ta or TaN is disposed between the underlying copper interconnect 202 and the overlying aluminum interconnect 210 to prevent interdiffusion of copper and aluminum.
As illustrated in TABLE 1, the TaxOy (or TaxNyOz) layer that forms on the TaN interdiffusion barrier layer 106 (FIG. 1A) and layer 206 (FIG. 2A) causes the contact resistance to increase by 6× after 12 hours of exposure to air and by 10× after 24 hours of exposure to air. In addition, the increase in electrical contact resistance caused by the TaxOy layer typically varies from contact to contact. Those skilled in the art will recognize that the magnitude of the increase in electrical resistance depends on both the test structure and measurement technique used; TABLE 1 was generated from 4-point probe measurements to maximize sensitivity to interface resistance and is intended solely to provide a baseline reference for quantifying the improvement afforded by the invention.
TABLE 1TaN in via Resistanceexposure to airIncrease12 hours 6x24 hours10x
The metal oxide layer may be removed by various means such as sputter etching prior to deposition of the aluminum bond pad metal 110 or the upper aluminum interconnect metal 210, but this often causes other problems. For example if an argon sputter etch is used to remove the TaxOy layer that forms on the TaN barrier layer 106 and 206 prior to AlCu 110 and 210 deposition, the sputter etch process introduces particles which reduces yield. In addition the presputter etch alters the morphology of the deposited AlCu, 110 or 210, resulting in a decrease in electromigration resistance.